File: //lib/firmware/intel/sof-tplg/sof-cml-demux-rt5682.tplg
CoSA $ s p ( CoSA $ � � PCM0P Low Latency Playback 0 ���� D � ��xm�A����Ѕ+$ � � � � PGA1.1 ���� � � ~g~��_�A�������$ � � � < � s24le � � � 1 Master Playback Volume � �� h ���� ���� ���� ���� ���� ���� � MUXDEMUX1.0 ���� � � hh��0G�����$ � � � < � DEMUX � DEMUX1 0 � 0 H SOF ( @ @� @� � BUF1.0 ���� d e q � BUF1.1 ���� d e A � BUF1.2 ���� d e A �
SSP0.OUT SSP0-Codec ���� � � '
�¼�PA�$\y��K � � $ � � � < � SSP < � s24le � PIPELINE.1.SSP0.OUT SSP0.OUT ���� P < � � � � � � � � � CoSA $ � � PCM0C Passthrough Capture 0 ���� D � ��xm�A����Ѕ+$ � � � � PGA2.0 ���� � � ~g~��_�A�������$ � � � < � s24le � � � � 2 Master Capture Volume � x�d h P ���� ���� ���� ���� ���� ���� � BUF2.0 ���� d e q � BUF2.1 ���� d e q � SSP0.IN SSP0-Codec ���� � � '
�¼�PA�$\y��K � � $ � � � < � SSP < � s24le � PIPELINE.2.SSP0.IN SSP0.IN ���� P < � � � � � � � � � CoSA $ � � PCM1C Passthrough Capture 1 ���� D � ��xm�A����Ѕ+$ � � � � BUF3.0 ���� d e q � DMIC0.IN dmic01 ���� � � '
�¼�PA�$\y��K � � $ � � � < � DMIC < � s32le � PIPELINE.3.DMIC0.IN DMIC0.IN ���� P < � � � � � � � � � CoSA $ � � PCM2P Passthrough Playback 2 ���� D � ��xm�A����Ѕ+$ � � � � PGA4.0 ���� � � ~g~��_�A�������$ � � � < � s32le � � � 4 Master Playback Volume � �� h ���� ���� ���� ���� ���� ���� � BUF4.0 ���� 0 d e q � � BUF4.1 ���� 0 d e q � �
HDA0.OUT iDisp1 ���� � � '
�¼�PA�$\y��K � � $ � � � < � HDA < � s32le � PIPELINE.4.HDA0.OUT HDA0.OUT ���� P < � � � � � � � � � CoSA $ � � PCM5C Passthrough Capture 5 ���� D � ��xm�A����Ѕ+$ � � � � BUF5.0 ���� d e q � ECHO REF 5 ���� � PIPELINE.5.PCM5C PCM5C ���� P < � � � � � � � � P� CoSA $ � � PCM4P Passthrough Playback 4 ���� D � ��xm�A����Ѕ+$ � � � � PGA6.0 ���� � � ~g~��_�A�������$ � � � < � s32le � � � 6 Master Playback Volume � �� h ���� ���� ���� ���� ���� ���� � BUF6.0 ���� 0 d e q � � BUF6.1 ���� 0 d e q � �
HDA2.OUT iDisp3 ���� � � '
�¼�PA�$\y��K � � $ � � � < � HDA < � s32le � PIPELINE.6.HDA2.OUT HDA2.OUT ���� P < � � � � � � � � � CoSA $ � � PCM3P Passthrough Playback 3 ���� D � ��xm�A����Ѕ+$ � � � � PGA7.0 ���� � � ~g~��_�A�������$ � � � < � s32le � � � 7 Master Playback Volume � �� h ���� ���� ���� ���� ���� ���� � BUF7.0 ���� 0 d e q � � BUF7.1 ���� 0 d e q � �
HDA1.OUT iDisp2 ���� � � '
�¼�PA�$\y��K � � $ � � � < � HDA < � s32le � PIPELINE.7.HDA1.OUT HDA1.OUT ���� P < � � � � � � � � � CoSA $ ` � Port1 Port1 0 h Low Latency Playback 0 D �� �� � @ h Passthrough Capture 0 D �� �� � @ � DMIC DMIC 1 h Passthrough Capture 1 �� �� � @ � HDMI1 HDMI1 2 h Passthrough Playback 2 D �� �� � @ � HDMI2 HDMI2 3 h Passthrough Playback 3 D �� �� � @ � HDMI3 HDMI3 4 h Passthrough Playback 4 D �� �� � @ � EchoRef EchoRef 5 h Passthrough Capture 5 D �� �� � @ CoSA
$ t# x SSP0-Codec x 6n �$ �� � , � � � � � � � < � SSP � x dmic01 x , T X Y �$ Z >I [ ( \ < ` �� a b � ] < � DMIC � D � � � � � � � D � � � � � � � x iDisp1 x l � �� � < � HDA � x iDisp2 x l � �� � < � HDA � x iDisp3 x l � �� � < � HDA � CoSA $ � BUF5.0 MUXDEMUX1.0 CoSA $ BUF1.0 PCM0P PGA1.1 BUF1.0 BUF1.1 PGA1.1 MUXDEMUX1.0 BUF1.1 BUF1.2 MUXDEMUX1.0 SSP0.OUT BUF1.2 CoSA $ PCM0C BUF2.0 BUF2.0 PGA2.0 PGA2.0 BUF2.1 BUF2.1 SSP0.IN CoSA $ PCM1C BUF3.0 BUF3.0 DMIC0.IN CoSA $ BUF4.0 PCM2P PGA4.0 BUF4.0 BUF4.1 PGA4.0 HDA0.OUT BUF4.1 CoSA $ � PCM5C BUF5.0 BUF5.0 ECHO REF 5 ECHO REF 5 SSP0.IN CoSA $ BUF6.0 PCM4P PGA6.0 BUF6.0 BUF6.1 PGA6.0 HDA2.OUT BUF6.1 CoSA $ BUF7.0 PCM3P PGA7.0 BUF7.0 BUF7.1 PGA7.0 HDA1.OUT BUF7.1